Lowering defect densities and increasing yields remain key challenges for chipmakers and designers, who rely on hundreds of techniques to optimize semiconductor fabrication. Every process step—from lithography to etching—can impact defect rates and yields.

In a recent study published in Nature on November 8, 2025, researchers from Peking University and Tsinghua University visualized how photoresist molecules dissolve, migrate, and entangle within developer liquids during the pattern-forming development step. Using cryogenic electron tomography (cryo-ET), the team reconstructed the three-dimensional structure of photoresist polymers in a hydrated state at sub-5 nm resolution, providing unprecedented insight into defect formation.

The study revealed that most photoresist molecules cluster at the gas–liquid interface rather than dispersing evenly in solution. These clusters are a major source of pattern defects. The researchers found that slightly increasing the PEB temperature from 95°C to 105°C and maintaining a continuous developer layer prevented cluster formation, cutting defect density by more than 99% on 300 mm wafers using existing resists and DUV equipment.

However, the practical impact of these findings is limited, as chipmakers already optimize PEB temperatures for each process node to achieve the best results.

Understanding the Lithography Step

Lithography involves several sequential steps:

1. Coating: The wafer is spin-coated with photoresist.

2. Exposure: Ultraviolet (UV) or Extreme Ultraviolet (EUV) light passes through a mask to selectively expose the resist.

3. Post-Exposure Bake (PEB): Exposed resist is heated to activate acid-catalyzed reactions that change solubility.

4. Development: The wafer is rinsed with a developer solution (often TMAH in water for DUV), forming a thin liquid film and transferring the pattern. This step was the focus of the study.

5. Rinse and Dry: Remaining resist patterns are cleaned and dried for further processing.

The researchers discovered that during development, photoresist molecules form weak, reversible entanglements that create microscopic clusters, which ultimately lead to pattern defects on semiconductor wafers.

Cryo-ET Reveals Hidden Mechanisms

Traditionally, scanning electron microscopy (SEM) or atomic-force microscopy (AFM) could only capture dried residues, providing indirect insight into resist behavior. To observe live molecular behavior, the team applied cryo-ET—a technique used in structural biology to image cells and proteins in frozen states—to visualize polymers inside a developer solution at nanometer resolution.

Using a poly(methacrylate)-based chemically amplified resist (CAR) commonly applied in 193 nm DUV and 13.5 nm EUV lithography, they found that 80% of the polymer mass accumulated near the gas–liquid interface in 25–100 nm-thick films, forming clusters 30–40 nm wide. This clustering pattern was consistent across other resists designed for 248 nm and 365 nm exposures. Control samples with developer only showed no clustering, confirming the effect originated from the polymers themselves.

DUV vs. EUV: A Critical Difference

In DUV lithography, a PEB at 105°C is within the normal operating range for poly(methacrylate)-based CARs. The elevated temperature slightly increases polymer mobility and acid diffusion, enabling smoother dissolution and improved pattern uniformity, reducing residues and defects while maintaining yield. However, PEB at 105°C may increase line-edge roughness (LER) and line-width roughness (LWR) for critical layers, limiting its universal applicability.

In EUV lithography, which defines features as small as 13 nm, resist baking typically occurs between 80°C and 95°C to maintain critical-dimension control. Raising the PEB to 105°C would accelerate acid diffusion, broaden reaction zones, and increase stochastic variations, significantly degrading line fidelity and generating new defects. As a result, the method that reduces defects in DUV is catastrophic for EUV applications.

Further 3D reconstructions revealed that polymer chains near the surface aggregated into clusters larger than typical killer defects in modern nodes. These clusters are reversible by heat and are largely mitigated in advanced semiconductor processes.

Practical Implications

While the study provides valuable microscopic insights into photoresist behavior, its practical impact is limited. The 105°C PEB adjustment is already within safe bounds for DUV lithography and offers no breakthrough for advanced nodes. For EUV lithography, the same temperature change could be highly destructive.

Overall, the research is scientifically significant, confirming mechanisms that chipmakers have long controlled empirically. However, it does not provide actionable improvements for modern EUV-based fabrication. The use of cryo-ET in semiconductor process research may still pave the way for future breakthroughs if adopted by leading companies such as Intel, Samsung, or TSMC.