SANTA CLARA, Calif., April 14, 2025 – Advanced Micro Devices (AMD) has unveiled its next-generation AMD EPYC™ processor, codenamed "Venice," which is set to become the first high-performance computing (HPC) product in the industry to be manufactured using TSMC's cutting-edge 2nm (N2) process technology. This marks a significant achievement in the AMD-TSMC partnership, underscoring the success of their collaboration to push the boundaries of semiconductor innovation.

The Venice processor, part of AMD's sixth-generation EPYC product line, will utilize TSMC's advanced N2 manufacturing process, and its silicon has already been successfully taped out and validated. This achievement highlights AMD's commitment to a bold product roadmap and showcases TSMC's readiness to deploy its state-of-the-art technology. While further technical details about the Venice processor are yet to be disclosed, AMD's confirmation that the chip has passed initial functional tests demonstrates the successful integration of this groundbreaking technology.

AMD CEO Dr. Lisa Su emphasized the importance of the collaboration with TSMC, noting, "TSMC has been a key partner for many years, and our deep collaboration with their R&D and manufacturing teams has allowed us to continually deliver leading products that push the limits of high-performance computing. Being a lead HPC customer for TSMC's N2 process is a testament to our close partnership in driving innovation."

In addition to Venice, AMD also announced the successful bring-up of its fifth-generation EPYC processors at TSMC's new Fab 21 in Arizona. This marks a significant step in AMD's commitment to U.S. manufacturing, as part of the company's ongoing efforts to localize production and strengthen its foothold in the American market.

TSMC's N2 process is based on Gate-All-Around (GAA) nanosheet transistor technology and is expected to offer a 24-35% reduction in power consumption compared to the previous N3 process, while simultaneously enhancing performance by 15% under constant voltage. The chip's density will also see a significant increase, further boosting the potential of the 2nm architecture.

"AMD's collaboration with TSMC has consistently delivered industry-leading products," said Dr. C.C. Wei, CEO of TSMC. "As AMD's primary HPC customer for the N2 process, we are driving advancements that will elevate the performance, energy efficiency, and yield of high-performance chips."

The Venice processor is scheduled to launch next year, in line with AMD's data center CPU roadmap. AMD's CEO, Dr. Lisa Su, also noted that the company's ongoing collaboration with TSMC and its deep investments in advanced semiconductor technologies will drive continued innovation in the high-performance computing sector.

While AMD's competitors, including Intel, have faced delays with their own 2nm and next-gen products, AMD's Venice processor showcases the company's leadership in pushing the boundaries of semiconductor manufacturing. Analysts are optimistic about the potential for increased profitability, especially as AMD continues to roll out innovations in HPC, AI, and cloud computing.

In related news, AMD's latest partnerships with major cloud providers have further raised the company's profile. Google Cloud's new C4D and H4D virtual machines will feature AMD's fifth-generation EPYC processors, marking a significant leap in cloud computing performance. Meanwhile, TD Cowen maintains a "Buy" rating on AMD, though it has lowered its price target due to market sentiment and competitive pressures from Intel.

Looking ahead, AMD is gearing up for its "Advancing AI 2025" event, scheduled for June 12, 2025. The event will focus on the company's plans for AI and new GPU products, further reinforcing its position as a leader in high-performance computing.

AMD's Venice processor, powered by TSMC's advanced 2nm technology, is expected to play a pivotal role in shaping the future of high-performance computing and will likely have significant implications for the broader semiconductor landscape.